The present invention relates to a semiconductor memory, and more particularly to a memory which achieves a reliable operation by preventing a malfunction when information is read out.
Semiconductor memories are broadly classified into bipolar and MOS semiconductor memories from the viewpoint of the types of elements used, and into the static type and the dynamic type from the viewpoint of how the information is retained. Among these classifications, the bipolar static memories are principally used in the fields in which high speeds are required. One well known type of such bipolar static memories employs integrated injection logic (hereinbelow), written "IIL") for the memory cells.
Japanese Publication of Pat. No. 50-12866 (1975) discloses an example of the memory whose memory cells are constructed of IIL elements.
In the example shown in this Japanese publication, a transistor portion connected to the bit line of the memory cell is operated in its forward direction in a read-out mode. This can lead to a problem that a malfunction occurs in the read-out mode, depending upon the values of the current gain of the transistor and the stray capacitance of the bit line.